ASIC Design Engineer - Fullchip Timing
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FULL DESCRIPTION
ASIC Design Engineer - Fullchip Timing
[Employer hidden — sign up to reveal] is hiring an ASIC Design Engineer to define, design, and verify ASIC subsystems for networking chips. Collaborate with front-end and back-end teams to manage fullchip timing constraints and static timing analysis. Minimum qualifications include Bachelors + 8 years experience, SDC development, STA tools, and Verilog/SystemVerilog.
Your Impact
- Being a member of design team who oversees fullchip SDCs and works with physical design and DFT teams to close fullchip timing in multiple timing modes.
- Option to also do block level RTL design or block or top-level IP integration.
- Helping develop efficient methodology to promote block level SDCs to fullchip, and to bring fullchip SDC changes back to block level.
- Helping develop and apply methodology to ensure correctness and quality of SDCs as early as possible in design cycle.
- Reviewing block level SDCs and clocking diagrams and mentor other RTL design owners on SDC development.
- Creating fullchip clocking diagrams and related documentation.
Minimum Qualifications
- Bachelors + 8 years of related experience, or Masters + 6 years of related experience, or PhD + 1 year of related experience.
- Experience with block / full chip SDC development in functional and test modes.
- Experience in Static Timing Analysis and prior working experience with STA tools like PrimeTime/Tempus.
- Understanding of related digital design concepts (e.g. clocking and async boundaries)
- Experience with Synthesis tools (e.g. Synopsys DC/DCG/FC), Verilog/System Verilog programming.
Preferred Qualifications
- Experience with constraint analyzer tools such as TCM (Timing Constraint Manager from Synopsys) and CCD (Conformal Constraint Designer from Cadence)
- Experience with Spyglass CDC and Glitch analysis.
- Experience using Formal Verification: Synopsys Formality and Cadence LEC.
- Experience with scripting languages such as Python, Perl, or TCL.
Why [Employer hidden — sign up to reveal]?
At [Employer hidden — sign up to reveal], we’re revolutionizing how data and infrastructure connect and protect organizations in the AI era – and beyond. We’ve been innovating fearlessly for 40 years to create solutions that power how humans and technology work together across the physical and digital worlds. These solutions provide customers with unparalleled security, visibility, and insights across the entire digital footprint.
Fueled by the depth and breadth of our technology, we experiment and create meaningful solutions. Add to that our worldwide network of doers and experts, and you’ll see that the opportunities to grow and build are limitless. We work as a team, collaborating with empathy to make really big things happen on a global scale. Because our solutions are everywhere, our impact is everywhere.
We are [Employer hidden — sign up to reveal], and our power starts with you.
[Employer hidden — sign up to reveal] is an equal opportunity employer and all qualified applicants will receive consideration for employment without regard to race, color, religion, gender, sexual orientation, national origin, genetic information, age, disability, veteran status, or any other legally protected basis.