Silicon One Front-End Design Engineer

🔒 Confidential Employer
Posted 8 May 2026
LOCATION
Not specified
TYPE
Full-time
LEVEL
Mid-Senior level
CATEGORY
Engineering
This employer holds a UK Home Office sponsor license — sponsorship for this specific role is at the employer’s discretion

SKILLS

RTL design Verilog SystemVerilog UVM Micro-architecture specifications Timing analysis MATLAB Clock Domain Crossing (CDC)

FULL DESCRIPTION

Silicon One Front-End Design Engineer

[Employer hidden — sign up to reveal] is hiring a Silicon One Front-End Design Engineer to join the [Employer hidden — sign up to reveal] Silicon One Front-End Design team.

Meet the Team

Join the [Employer hidden — sign up to reveal] Silicon One Front-End Design team, at the core of [Employer hidden — sign up to reveal]’s silicon development. Our engineers cover the full spectrum of chip design: definition, architecture, micro-architecture, RTL design, verification, signoff, and validation. We leverage cutting-edge silicon technologies and methodologies to develop the largest-scale and most advanced devices, pushing the boundaries of what’s possible. [Employer hidden — sign up to reveal] Silicon One™ is transforming the industry with a unified, programmable architecture powering [Employer hidden — sign up to reveal]’s future routing portfolio and shaping the Internet for decades to come.

Your Impact

  • Write and review micro-architecture specifications
  • Implement RTL (Verilog/SystemVerilog) to meet timing, performance, and power requirements
  • Contribute to full chip integration, timing methodology, and analysis
  • Collaborate with verification engineers to resolve bugs and achieve coverage closure
  • Work with the physical design team to close timing and PnR issues
  • Support design methodology evolution and best practices
  • Perform debug, root-cause analysis, and post-silicon validation in the lab

Minimum Qualifications

  • B.Sc./M.Sc. in Electrical Engineering from a top university
  • Minimum of 8 years of proven experience in a relevant field
  • RTL design experience
  • Familiarity with UVM and functional verification methodologies

Preferred Qualifications

  • Experience with MATLAB simulations and bit-exact modeling environments
  • Familiarity with mixed-signal systems and environments
  • Knowledge and hands-on experience with Clock Domain Crossing (CDC)

Why [Employer hidden — sign up to reveal]?

At [Employer hidden — sign up to reveal], we’re revolutionizing how data and infrastructure connect and protect organizations in the AI era – and beyond. We’ve been innovating fearlessly for 40 years to create solutions that power how humans and technology work together across the physical and digital worlds. These solutions provide customers with unparalleled security, visibility, and insights across the entire digital footprint. Fueled by the depth and breadth of our technology, we experiment and create meaningful solutions. Add to that our worldwide network of doers and experts, and you’ll see that the opportunities to grow and build are limitless. We work as a team, collaborating with empathy to make really big things happen on a global scale. Because our solutions are everywhere, our impact is everywhere. We are [Employer hidden — sign up to reveal], and our power starts with you.

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