ASIC Verification Engineer

🔒 Confidential Employer
Posted 8 May 2026
LOCATION
Not specified
TYPE
Full-time
LEVEL
Entry-level
CATEGORY
Engineering
This employer holds a UK Home Office sponsor license — sponsorship for this specific role is at the employer’s discretion

SKILLS

System Verilog UVM Digital Design ASIC Verification Test Bench Development Test Plan Development Problem Solving Team Collaboration

FULL DESCRIPTION

ASIC Verification Engineer at [Employer hidden — sign up to reveal]

This is a potential job opportunity for recent graduates or early career professionals passionate about high-speed networking chips.

Job Description

Please note this posting is to advertise potential job opportunities. This exact role may not be open today but could open in the near future. When you apply, a [Employer hidden — sign up to reveal] representative may contact you directly if a relevant position opens.

Meet the Team

Are you a recent graduate or early career professional, passionate about cutting-edge technology and eager to gain hands-on experience in the development of high-speed networking chips? Join the [Employer hidden — sign up to reveal] Common ASIC Group as an ASIC Verification Engineer. This role offers a unique opportunity to contribute to crafting the ASICs that power the world's data flow every time someone connects online.

Your Impact

  • Develop and maintain advanced test benches and verification environments using System Verilog and UVM.
  • Execute the end-to-end verification process of complex ASIC design blocks.
  • Develop comprehensive test plans and coverage points to ensure robust verification.
  • Implement the upgrade and refinement of test benches to integrate new features seamlessly.
  • Collaborate with cross-functional teams for thorough cross-block verification and top-level integration.

Minimum Qualifications

  • Bachelor's or Master's degree in Electrical & Electronics Engineering (EE) or Computer Engineering (CE).
  • 0-3 years of experience in ASIC verification (including relevant internships or academic projects).
  • Strong knowledge in Digital Design and ASIC flow.
  • Proficiency in System Verilog-based verification.

Preferred Qualifications

  • Familiarity with UVM.
  • Eagerness to learn and a proactive approach to problem-solving.
  • Excellent team working skills, with the ability to collaborate effectively with colleagues across different functions.
  • Self-driven mindset with a commitment to personal and professional development.

Why [Employer hidden — sign up to reveal]?

At [Employer hidden — sign up to reveal], we’re revolutionizing how data and infrastructure connect and protect organizations in the AI era – and beyond. We’ve been innovating fearlessly for 40 years to create solutions that power how humans and technology work together across the physical and digital worlds. These solutions provide customers with unparalleled security, visibility, and insights across the entire digital footprint.

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