Staff CPU Researcher

🔒 Confidential Employer
Posted 7 May 2026
LOCATION
Cambridge
TYPE
Full-time
LEVEL
Mid-Senior level
CATEGORY
Technology
This employer holds a UK Home Office sponsor license — sponsorship for this specific role is at the employer’s discretion

SKILLS

CPU Microarchitecture Architectural Simulation (GEM5) Interpreter/JIT Compiler Internals C/C++ Systems Programming Linux V8 Internals Compiler Optimization

FULL DESCRIPTION

Staff CPU Researcher

Company: [Employer hidden — sign up to reveal] Limited
Location: Cambridge, UK
Work Type: On-site
Job Type: Full-time
Experience Level: Mid-Senior level

Job Summary

We are seeking a highly skilled and experienced Staff Research Scientist with strong ISA extensions experience. This is a high-level research and development role.

Key Responsibilities

  • Analyse dynamic language overhead: Profile V8 and ArkTS interpreter/JIT to identify operations that consume disproportionate cycles (type checks, inline cache misses, garbage collection barriers, dynamic dispatch, deoptimisation)
  • Design ISA extensions: Propose new instructions or architectural features that accelerate common dynamic language patterns while maintaining backward compatibility and security boundaries
  • Prototype in software: Modify V8, ArkTS interpreter, or JIT compiler to use new instructions, measuring speedup on representative workloads (OpenHarmony apps, JavaScript benchmarks, browser workloads)
  • Model in architectural simulators: Implement proposed extensions in GEM5
  • Collaborate on RTL implementation: Work with digital design teams to refine instruction encoding, pipeline integration, and verification requirements
  • Publish and patent: Document novel contributions through internal technical reports, conference papers, and patent applications

Requirements

Required:

  • Deep understanding of CPU microarchitecture: pipelines, out-of-order execution, branch prediction, memory hierarchy, ISA design principles
  • Experience with architectural simulation (GEM5, Sniper, ZSim, or proprietary tools)
  • Familiarity with interpreter or JIT compiler internals—any of: V8, SpiderMonkey, JavaScriptCore, HotSpot, ART, LuaJIT, PyPy, or similar
  • Strong C/C++ and systems programming skills
  • Comfortable working in Linux environments with Git, Make, scripting
  • Equivalent industry experience (5+ years in CPU architecture, compilers, or language runtimes) welcomed
  • PhD or MSc in Computer Science, Computer Engineering, or Electrical Engineering preferred

Desired:

  • Experience with RISC-V or ARM ISA extensions
  • Knowledge of tagged architectures, hardware type checking, or speculative optimisation support
  • Familiarity with V8 internals (TurboFan, Ignition, inline caches, hidden classes) or ArkCompiler/ArkTS
  • Background in compiler optimisation (SSA, register allocation, instruction selection)
  • Publication record in computer architecture or programming language implementation

About [Employer hidden — sign up to reveal]

[Employer hidden — sign up to reveal] Limited is part of [Employer hidden — sign up to reveal], a leading global provider of ICT infrastructure and smart devices. [Employer hidden — sign up to reveal] R&D UK division has design centers in Cambridge, London, Edinburgh, Ipswich and Bristol. For more information, visit the career site.

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