Senior Verification Engineer

🔒 Confidential Employer
Posted 24 March 2026
LOCATION
Milton Keynes
TYPE
Full-time
LEVEL
Mid-Senior level
CATEGORY
Engineering
This employer holds a UK Home Office sponsor license — sponsorship for this specific role is at the employer’s discretion

SKILLS

SystemVerilog UVM Verilog VHDL Python ASIC verification RTL development

FULL DESCRIPTION

Join Our Team as a Senior Verification Engineer at [Employer hidden — view at passion-project.co.uk]!

Are you ready to shape the future of augmented reality in the automotive industry? At [Employer hidden], we are an internationally recognized innovator specializing in the development and supply of holographic technologies for Tier 1 suppliers and OEMs, with a primary focus on cutting-edge AR Head-up Displays (HUDs).

Your Role

As a Senior Validation and Verification Engineer, you will play a pivotal role in developing and setting up verification environments. Your duties will include:

  • Generating and maintaining Vplans to ensure structured verification processes.
  • Constructing testbenches at various levels (unit, multi-unit, and top-level) from scratch.
  • Creating test cases to verify block functionalities effectively.
  • Integrating reference models (e.g., SV model, Python model, or Matlab model) into the verification framework.
  • Planning verification activities in line with project timelines and deadlines.
  • Running simulations and regressions, tracking verification progress according to the Vplan.
  • Constructing coverage plans that reflect design requirements accurately.
  • Managing resources, including tool chain maintenance and license server handling.
  • Leading and participating in code reviews to ensure high-quality outputs.
  • Engaging in FPGA validation and post-debug processes to refine our products.
  • Providing feedback and suggestions for process improvements to design teams.
  • Collaborating with FPGA/ASIC vendors and third-party IP vendors on simulation and verification activities.

What We’re Looking For

To excel in this role, you should have:

  • A Degree in Computer/Electronics Engineering or a similar technical field.
  • 7+ years of experience in ASIC/IP-related verification.
  • Significant involvement in full system verification of complex SoC ASICs.
  • Experience in RTL/ASIC development, from requirement analysis to tape-out.
  • Expertise in SystemVerilog, SVA, and UVM.
  • Strong proficiency in Verilog and VHDL, along with experience in scripting languages like Tcl/Tk and/or Python.

An may also have, although not essential:

  • Strong debugging and code analysis skills.
  • A willingness to learn and grow within the team.
  • A collaborative team player attitude.
  • The ability to adapt and adjust to challenges.
  • Experience with C/C++ development.
  • Familiarity with SW+HW co-verification and Matlab.
  • Knowledge of formal verification techniques.
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