FPGA / Digital Design Engineer

What You’ll Do

As an FPGA / Digital Design Engineer, you will:

• Architect, design, implement, verify, and integrate digital logic (RTL) for FPGA / SoC platforms
• Work on signal processing, communications, data pipelines, digital beamforming, or related SDR blocks
• Develop testbench environments, simulations, and formal/verifiable test strategies
• Perform timing closure, clock domain crossing, resource balancing, power optimisation
• Define interfaces and protocols (e.g. high-speed serial links, memory, buses)
• Assist with board bring-up, hardware bring-up, debugging on lab benches
• Work closely with software / firmware teams to co-design hardware/software interfaces
• Provide support for integration, validation, and performance characterisation
• Contribute to architecture trade studies, partitioning, and technology evaluation
• Document design decisions, reviews, and maintain version control & release flows

You will likely be involved across the full design cycle—from requirements to flight qualification.

Key Skills & Experience

Essential:

• Degree in Electronic / Electrical / Computer Engineering (or equivalent)
• Strong experience in digital design with VHDL and/or Verilog / SystemVerilog
• Proven track record performing synthesis, timing closure, and static timing analysis
• Experience with FPGA tool flows (e.g. Xilinx Vivado, Intel/Altera tools, or similar)
• Familiarity with simulation / verification tools (ModelSim, Questa, VCS, etc.)
• Experience working with high-speed interfaces (e.g. multi-gigabit serializers, DDR, memory, LVDS, SERDES)
• Good understanding of digital design fundamentals: clock domains, reset schemes, pipelining, CDC, floorplanning
• Lab/hardware debugging skills (oscilloscopes, logic analysers, signal integrity experience)
• Strong problem-solving skills and desire to get “hands-on” with both code and hardware
• Good communication skills, able to work in cross-disciplinary teams

Desirable (but not required):

• Prior experience in SpaceWire / space communication protocols
• Exposure to SDR or digital signal processing FPGA implementation
• Experience with ASIC flows or FPGA-ASIC migration
• Familiarity with standards / quality in the aerospace / space domain (e.g. radiation mitigation, reliability)
• Experience with scripting (Python, Tcl, Bash, etc.) for automation and flow integration
• Knowledge of formal verification, constraint generation, or static analysis tools
• Experience working in remote / hybrid settings, distributed teams

What We Offer

• Competitive salary (market-aligned)
• Hybrid / remote flexible working (with occasional on-site work near Reading as needed)
• Opportunity to work on space / satellite technologies and cutting-edge SDR systems
• Exposure to full design lifecycle and close collaboration with domain experts
• Professional growth: mentoring, technical breadth, and stretch responsibilities
• A technically rich, supportive environment where engineers make real impact

Candidate Profile

We’re looking for candidates who are:

• Passionate about FPGA / digital systems and enjoy low-level detail
• Self-motivated and able to independently drive modules from spec → delivery
• Comfortable working in a fast-moving R&D / development environment
• Interested in space / satellite communication systems
• UK-based or willing to relocate within reasonable commuting distance (or remote)
• Legally permitted to work in the UK (no visa sponsorship available)

How to Apply

If you are excited by FPGA design and want to contribute to SDR / space systems, please apply with your CV and a brief cover note highlighting relevant FPGA / digital projects.

We will review applications promptly, interview qualified candidates (remote or in-person), and move quickly.

Please send all applications or questions to: [contact hidden]